Running on the engine's own output
Explore the space. Follow a compile. Check the estimate.
Every number below was produced by the engine: its T0 model over every buildable architecture, a real compile through MLIR, and cycle-accurate RTL simulation. Estimates and measurements are labelled.
Watch · 3 minutes, real runs
Launching Atelier Studio: from install to an exported design
The trial installed from its release, a new Sutra project, then Explore on YOLOv8n at 640×640 for the lowest power at any frame rate: 10 designs, each compiled by the compiler and timed on the SoC model, across architectures. The search recommends a Yantra design (one 32×32 weight-stationary engine, 96 frames a second at 0.25 W). Its profile, its RTL built and simulated against the reference model, then a license installed and the RTL exported. No sound; the long runs are sped up and say so on screen, and every figure names the model it comes from.
Try it yourself · Atelier Studio trial 0.1.5
Atelier Studio on your machine
Atelier Studio runs in your browser, on your machine only: nothing about your projects leaves it. In the trial you can do everything but export:
- Create a project from a reference architecture (Sutra, compute-in-memory; Yantra, a systolic NPU) or import your own RTL as blocks.
- Explore from a workload and targets (frame rate, power, area) to designs: for each design, the compiler builds that design's own compiler search space from its hardware description, searches it, compiles the best program and times it on the SoC model.
- Build and simulate the design you pick: its RTL generated, linted and simulated against the reference model, engine and SoC.
- Export the design (its RTL, file list and machine description) with a license from ZenEdgeX.
Runs on a Mac with Apple silicon (Linux x86_64 comes in a later release). It needs uv, Docker and the Xcode command-line tools. Trial downloads are by invitation: ask with your GitHub username and we add you.
Then, with the release’s four files in one folder under your home folder:
shasum -a 256 -c SHA256SUMS
tar xzf atelier-studio-trial-0.1.5.tar.gz
cd atelier-studio-trial-0.1.5
./install.sh
./studio.sh my-project
Studio’s top bar has Work with us: bring your own engine (a CIM macro, a systolic array, a vector or LLM engine) or your own SoC and flow, or design your accelerator with us as a design partner. The request is shown in full and sent from your own mail app, only with what you tick. Or write to hello@zenedgex.in.
1 · Qwen3-0.6B on Sutra
Set the token rate, get the chip
2 · YOLOv8n on Sutra
Set the requirements, get the chip
3 · GEMM design space
Every buildable architecture, with its best compiler setting
4 · One compile
From linalg.matmul to the accelerator's commands
5 · Compiler settings
Same hardware, 24 compiler settings
6 · Estimate against simulation
T0 cycles against cycle-accurate RTL
| Architecture | RTL cycles | T0 estimate | Error |
|---|
RTL: the generated SystemVerilog in Verilator, running the compiled programs for all four training workloads, outputs checked against NumPy. T0 never simulates; it times the same command stream analytically in milliseconds.